Which dma channels are 8 bit

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If an 8-bit device is active, the address comes from DMA and microprocessor The address is 24 bits long. There is a register for each channel and therefore each device. There is a data register for each channel as well. Address bits AA23 are provided by microprocessor 32 via data bus to page register These 8 bits are provided once at the beginning of a data transfer operation.

Thereafter, the data transfer takes place within a 64kB address space per page where the page address is defined by AA23 and byte addresses within the page are defined by A0-A If a bit device is active, the address comes from DMA and microprocessor The address is a 24 bits long.

Address A0 is always presumed to be 0. This permits the AT bus to use two-byte data transfers and enlarges the page address space from 64k to k as explained shortly. These 7 bits are provided once at the beginning of a data transfer operation.

Thereafter, the data transfer takes place within a kB page address space where the page address is defined by AA23, and byte addresses within the page are defined by A1-A Address bit A16 from page register is blocked by gate The preferred embodiment of the invention is shown in FIG.

A control register in the system control registers stores an 8-bit or bit mode or select bit for each of the DMA channels 5, 6 and 7. This mode bit for each of the channels is preferably set by a write command in the system POST program routine. Once the mode bit is written for each of the three bit DMA channels, it may be read, when the channel is active, to select whether the channel is to operate as an 8-bit or bit channel.

To switch a bit DMA channel provided by DMA to an 8-bit channel, the following actions must be taken-- 1 the address bits from page register must be used as 64kB page addressing rather than as k page addressing, 2 the address bits from DMA must address each byte from addresses A0-A15 rather than each word two bytes from addresses A1-A To change the size of the page used by DMA when the 8-bit mode signal is present, the Address Enable AEN signal on line from DMA is used to enable gate to pass the A16 address bit from page register to address bus OR passes the AEN signal to gate To change the size of the page used by DMA back to kB bit mode , the bit mode bit is read from the control register for the active DMA channel.

Therefore, only address bits AA23 are used from page register ; i. To change the address bits from a two byte address space interval to one byte interval, selector is provided. While a number of preferred embodiments of the invention have been shown and described, it will be appreciated by one skilled in the art, that a number of further variations or modifications may be made without departing from the spirit and scope of our invention.

All rights reserved. Login Sign up. Search Expert Search Quick Search. United States Patent Once the mode bit is written for each of the three bit DMA channels, it may be read when the channel is active to select whether the channel is to operate as an 8-bit or bit channel.

With this mode bit information available, the page addressing may be selectively changed from k size pages to 64k size pages when a bit DMA channel is to be converted to 8-bit. In addition, the byte addressing within a page may be changed from two byte addressing during bit mode to single byte addressing during 8-bit mode. That means that no adapter has a specific DMA channel all the time.

Additional Information The DMA channels has several different operating modes, and a couple of them can be joined together to allow direct datatransmissions without use of the CPU. The 8-bit channels can have base address in the memory area from 0 to 1 Mb. And the bit channels 4 - 7 can have base address from 0 to 16 Mb memory. The last 4 or 7 bits used to form the memory address comes from the DMA pageregisters.

DMA channel can address 64 Kbyte of memory where channel can address Kbyte of memory.